SPI Real time clock/calendar
Rev. 5 — 27 April 2011
Product data sheet
1. General description
The PCF2123 is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power
applications. Data is transferred serially via a Serial Peripheral Interface (SPI-bus) with a maximum data rate of 6.25Mbit/s. An alarm and timer function is also available providing the possibility to generate a wake-up signal on an interrupt pin. An offset register allows fine tuning of the clock.
2. Features and benefits
Real time clock provides year, month, day, weekday, hours, minutes, and seconds
based on a 32.768kHz quartz crystal
Low backup current while running: typical 100nAat VDD=2.0V and Tamb=25°CResolution: seconds to yearsWatchdog functionality
Freely programmable timer and alarm with interrupt capabilityClock operating voltage: 1.1Vto5.5V
3 line SPI-bus with separate, but combinable data input and outputSerial interface at VDD=1.6Vto5.5V1 second or 1 minute interrupt output
Integrated oscillator load capacitors for CL=7pFInternal Power-On Reset (POR)
Open-drain interrupt and clock output pins
Programmable offset register for frequency adjustment
3. Applications
Time keeping applicationBattery powered devicesMetering
High duration timersDaily alarms
Low standby power applications
1.The definition of the abbreviations and acronyms used in this data sheet can be found in Section21.
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PCF2123
SPI Real time clock/calendar
4. Ordering information
Table 1.
Ordering information
PackageName
PCF2123BS/1PCF2123TS/1PCF2123U/5GA/1PCF2123U/10AA/1PCF2123U/12AA/1PCF2123U/12HA/1
[1][2][3]
Unsawn wafer.
Sawn 6 inch wafer on Film Frame Carrier (FFC) for 6 inch wafer, see Figure37 on page53.
Sawn 6 inch wafer with gold bumps on Film Frame Carrier (FFC) for 8 inch wafer, see Figure38 on page53.
Type number
Description
plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 3 × 3 × 0.85mmplastic thin shrink small outline package; 14 leads;body width 4.4mm 12 bonding pads[1]12 bonding pads[2]
wafer level chip size package; 12bumps[3]wafer level chip size package; 12bumps[3]
VersionSOT758-1SOT402-1PCF2123U/10PCF2123U/10PCF2123U/12PCF2123U/12
HVQFN16TSSOP14wire bond diewire bond dieWLCSP12WLCSP12
5. Marking
Table 2.Marking codes
Marking code123PCF2123PC2123-1PC2123-1PC2123-1PC2123-1
Type numberPCF2123BS/1PCF2123TS/1PCF2123U/5GA/1PCF2123U/10AA/1PCF2123U/12AA/1PCF2123U/12HA/1
PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
6. Block diagram
OSCICOSCIOSCOCOSCOMONITOR0DhOFFSET FUNCTIONOffset_registerTIMER FUNCTION0Eh0FhTimer_clkoutCountdown_timerCONTROL00hPOWER ONRESET01hControl_1Control_2TIME02hWATCHDOG03h04h05h06hSDOSDISCLCERpdSPIINTERFACE07h08hSecondsMinutesHoursDaysWeekdaysMonthsYearsALARM FUNCTION09h0Ah0Bh0ChMinute_alarmHour_alarmDay_alarmWeekday_alarm013aaa223CLKOEOSCILLATOR32.768 kHzDIVIDERCLOCK OUTCLKOUTTESTVDDVSSINTERRUPTINTPCF2123Fig 1.Block diagram of PCF2123PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
7. Pinning information
7.1Pinning
16OSCIterminal 1index areaOSCOTESTINTCE1234567813VDD12CLKOUT11CLKOE10SCL9SDI15n.c.14n.c.PCF2123BSOSCIOSCOn.c.TESTINTCE1234567001aai55114VDD13CLKOUT12CLKOEPCF2123TS11n.c.10SCL98SDISDOn.c.VSSn.c.SDO001aai550VSSTransparent top viewFor mechanical details, see Figure30 on page45.Top view. For mechanical details, see Figure31 on page46.Fig 2.Pin configuration for HVQFN16 (PCF2123BS/1)Fig 3.Pin configuration for TSSOP14 (PCF2123TS/1)6OSCI75OSCO84TESTINTCEVSS91011122VDDCLKOUTCLKOEPCF2123U3SCLSDI1SDO001aai544Viewed from active side. For mechanical details, see Figure33 on page48 and Figure34 on page49.Fig 4.Pin configuration for PCF2123Ux (bare die)PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
7.2Pin description
Table 3.
Pin description
Description
HVQFN16 TSSOP14 PCF2123Ux (PCF2123BS/1)(PCF2123TS/1)(bare die)
OSCIOSCOn.c.TESTINTCEVSSSDOSDISCLCLKOEVDD
161
6, 7, 14, 152345[1]89101113
123, 1145678910121314
78-9101112[2]123456
oscillator input; high-impedance node; minimize wire length between quartz and package
oscillator output; high-impedance node; minimize wire length between quartz and package
do not connect and do not use as feed through; connect to VDD if floating pins are not allowed
test pin; not user accessible; connect to VSS or leave floating (internally pulled down)
interrupt output (open-drain; active LOW)
chip enable input (active HIGH) with internal pull downground
serial data output, push-pull; high-impedance when not driving; can be connected to SDI for single wire data lineserial data input; may float when CE is inactiveserial clock input; may float when CE is inactiveCLKOUT enable or disable pin; enable is active HIGHclock output (open-drain)
supply voltage; positive or negative steps in VDD may affect oscillator performance; recommend 100nF decoupling close to the device (see Figure29)
Symbol Pin
CLKOUT12
[1][2]
The die paddle (exposed pad) is wired to VSS and should be electrically isolated.The substrate (rear side of the die) is wired to VSS and should be electrically isolated.
PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
8. Functional description
The PCF2123 contains 16 8-bit registers with an auto-incrementing address counter, an
on-chip 32.768kHz oscillator with two integrated load capacitors, a frequency divider which provides the source clock for the Real Time Clock (RTC), a programmable clock output, and a 6.25 Mbit/s SPI-bus. An offset register allows fine tuning of the clock.All 16registers are designed as addressable 8-bit parallel registers although not all bits are implemented.
•The first two registers (memory address 00h and 01h) are used as control registers.•The memory addresses 02h through 08h are used as counters for the clock function
(seconds up to years). The registers Seconds, Minutes, Hours, Days, Weekdays, Months, and Years are all coded in Binary Coded Decimal (BCD) format. When one of the RTC registers is written or read the contents of all counters are frozen. Therefore, faulty writing or reading of the clock and calendar during a carry condition is prevented.
••••
Addresses 09h through 0Ch define the alarm condition.Address 0Dh defines the offset calibration.Address 0Eh defines the clock out and timer mode.
Address registers 0Eh and 0Fh are used for the countdown timer function. The
countdown timer has four selectable source clocks allowing for countdown periods in the range from 244 μs up to four hours. There are also two pre-defined timers which can be used to generate an interrupt once per second or once per minute. These are defined in register Control_2 (01h).
8.1Low power operation
Minimum power operation will be achieved by reducing the number and frequency of switching signals inside the IC, i.e., low frequency timer clocks and a low frequency
CLKOUT will result in lower operating power. A second prime consideration is the series resistance Rs of the quartz used.
8.1.1Power consumption with respect to quartz series resistance
The series resistance acts as a loss element. Low Rs will reduce current consumption further.
PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
250IDD(1)(nA)210001aai5581701309050020406080Rs(2) (kΩ)100Configuration: CLKOUT disabled, VDD=3V, timer clock set to 1⁄60Hz.(1)IDD (nA) minimum power mode.(2)Maximum value for RS is 100kΩ.Fig 5.IDD with respect to quartz RS8.1.2Power consumptions with respect to timer mode
Four source clocks are possible for the timer. The 4.096kHz source clock will add the greatest part to the power consumption. The selection of 64Hz, 1Hz, or 1⁄60Hz will be almost indistinguishable and add very little.
400IDD(1)(nA)300001aai559(2)200(3)1000024VDD (V)6Configuration: CLKOUT disabled, quartz RS=15kΩ.(1)IDD (nA) minimum power mode.(2)Timer clock = 4 kHz.(3)Timer clock = 64 Hz, 1 Hz, 1⁄60 Hz.Fig 6.IDD with respect to timer clock selectionPCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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PCF2123
SPI Real time clock/calendar
8.2Register overview
16 registers are available. The time registers are encoded in the Binary Coded Decimal (BCD) format to simplify application use. Other registers are either bit-wise or standard binary.
Table 4.Registers overview
Bit positions labelled as- are not implemented and will return a 0 when read. The bit position labelled as-- is not implemented and will return a 0 or 1 when read. Bit positions labelled withN should always be written with logic0[1].Address
Register name
Bit7
Control and status registers00h01h02h03h04h05h06h07h08h09h0Ah0Bh0Ch0Dh0Eh0Fh
[1]
6NSI
5STOPMSF
4SRTI_TP
3NAF
212_24TF
1CIEAIE
0NTIE
Control_1Control_2SecondsMinutesHoursDaysWeekdaysMonthsYearsMinute_alarmHour_alarmDay_alarmWeekday_alarmOffset_registerTimer_clkoutCountdown_timer
EXT_TESTMIOS------
Time and date registers
SECONDS (0 to 59)MINUTES (0 to 59)----AMPM
HOURS (1 to 12) in 12 h mode
HOURS (0 to 23) in 24 h modeDAYS (1 to 31)----WEEKDAYS (0 to 6)
MONTHS (1 to 12)
YEARS (0 to 99)AE_MAE_HAE_DAE_WMODE-MINUTE_ALARM (0 to 59)---AMPM
HOUR_ALARM (1 to 12) in 12 h mode
HOUR_ALARM (0 to 23) in 24 h modeDAY_ALARM (1 to 31)---WEEKDAY_ALARM (0 to 6)
Alarm registers
Offset register
OFFSET[6:0]COF[2:0]
TE
-CTD[1:0]
Timer registers
COUNTDOWN_TIMER[7:0]
Except in the case of software reset, see Section8.3.1.1.
PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
Product data sheetRev. 5 — 27 April 2011 8 of 63
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PCF2123
SPI Real time clock/calendar
8.3Control registers
8.3.1Register Control_1
Table 5.Bit765
Control_1 - control and status register 1 (address00h) bit description
Value0[1]1-0[1]1
Descriptionnormal mode
external clock test modeunused
the RTC source clock runsthe RTC clock is stopped;RTC divider chain flip-flops are asynchronously set to logic0;
CLKOUT at 32.768kHz, 16.384kHz or 8.192kHz is still available
-Section8.11ReferenceSection8.10
SymbolEXT_TESTNSTOP
4SR0[1]1
no software resetinitiate software reset[2];
this register will always return a 0 when read
Section8.3.1.1
321
N12_24CIE
-0[1]10[1]1
unused
24 hour mode is selected12 hour mode is selectedno correction interrupt generated
interrupt pulses will be generated at every correction cycleunused
--Section8.9
0
[1][2]
N
Default value.
--
For a software reset, 01011000 (58h) must be sent to register Control_1 (see Section8.3.1.1).
8.3.1.1Reset
A reset is automatically generated at power-on. A reset can also be initiated with the software reset command. It is generally recommended to make a software reset after power-on.
A software reset can be initiated by setting the bits 6, 4 and 3 in register Control_1 logic1 and all other bits logic0 by sending the bit sequence 01011000 (58h), see Figure7. If this bit sequence is not correct, the software reset instruction will be ignored to protect the device from accidently being reset. When sending the software instruction, the other bits are not written.
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Product data sheetRev. 5 — 27 April 2011 9 of 63
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PCF2123
SPI Real time clock/calendar
R/Wb70SCLCEinternalreset signalb60b50b41b30addr 00HEXb20b10b00b70b61software reset 58HEXb50b41b31b20b10b00(1)001aai562(1)When CE is inactive, the interface is reset.Fig 7.Software reset commandAfter reset, the following mode is entered:
••••••
32.768 kHz on pin CLKOUT active24 hour mode is selectedOffset register is set to 0No alarms setTimer disabledNo interrupts enabled
Table 6.Register reset values
Bits labeled as - are not implemented. Bits labeled as X are undefined at power-on and unchanged by subsequent resets.Address00h01h02h03h04h05h06h07h08h09h0Ah0Bh0Ch0Dh0Eh0Fh
Register nameControl_1Control_2SecondsMinutesHoursDaysWeekdaysMonthsYearsMinute_alarmHour_alarmDay_alarmWeekday_alarmOffset_registerTimer_clkoutCountdown_timer
Bit7001-----X11110-X
600XX----XX---00X
500XXXX--XXXX-00X
400XXXX-XXXXX-00X
300XXXX-XXXXX-00X
200XXXXXXXXXXX0-X
100XXXXXXXXXXX01X
000XXXXXXXXXXX01X
PCF2123All information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.
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分销商库存信息:
NXP
PCF2123TS/1,118PCF2123U/12HA/1,00
PCF2123TS/1,112PCF2123U/10AA/1,00
PCF2123BS/1,512PCF2123BS/1,518
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