SI1403BDL-T1-E3;中文规格书,Datasheet资料

Vishay Siliconix

P-Channel 2.5-V (G-S) MOSFET

PRODUCT SUMMARY

VDS (V)- 20

RDS(on) (Ω)0.150 at VGS = - 4.5 V 0.175 at VGS = - 3.6 V 0.265 at VGS = - 2.5 V

ID (A)- 1.5- 1.4- 1.2

2.9Qg (Typ.)

FEATURES

•Halogen-free According to IEC 61249-2-21

Definition

•TrenchFET® Power MOSFET

•Compliant to RoHS Directive 2002/95/EC

SOT-363SC-70 (6-LEADS)D165DMarking CodeODXYYLot Traceabilityand Date CodePart # CodeTop ViewD2DG34SOrdering Information: Si1403BDL-T1-E3 (Lead (Pb)-free) Si1403BDL-T1-GE3 (Lead (Pb)-free and Halogen-free)ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter

Drain-Source Voltage Gate-Source Voltage

Continuous Drain Current (TJ = 150 °C)aPulsed Drain Current

Continuous Diode Current (Diode Conduction)aMaximum Power Dissipation

a

Symbol VDSVGS

TA = 25 °CTA = 85 °C

IDIDMIS

TA = 25 °CTA = 85 °C

PDTJ, Tstg

5 s

- 20

Steady State ± 12

Unit V

- 1.5- 1.2

- 5

- 0.80.6250.400

- 55 to 150

- 1.4- 1.0- 0.80.5680.295

W°CA

Operating Junction and Storage Temperature Range

THERMAL RESISTANCE RATINGS

Maximum Junction-to-AmbientaMaximum Junction-to-Foot (Drain)Notes:

a. Surface Mounted on 1\" x 1\" FR4 board.

t ≤ 5 sSteady StateSteady State

RthJARthJF

165180105

200220130

°C/W

Parameter Symbol TypicalMaximumUnit Document Number: 73253S10-0110-Rev. D, 18-Jan-10www.vishay.com

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Si1403BDL

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SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Parameter Symbol Test Conditions Min.Typ.Static

Gate Threshold VoltageGate-Body Leakage

Zero Gate Voltage Drain CurrentOn-State Drain Currenta

Drain-Source On-State ResistanceaForward TransconductanceaDiode Forward VoltageaDynamicb

Total Gate ChargeGate-Source ChargeGate-Drain ChargeGate ResistanceTurn-On Delay TimeRise Time

Turn-Off Delay TimeFall Time

Source-Drain Reverse Recovery TimeBody Diode Reverse Recovery Charge

Qg Qgs Qgd Rgtd(on) trtd(off) tftrrQrr

IF = - 0.8 A, dI/dt = 100 A/µsVDD = - 10 V, RL = 10 Ω

ID ≅ - 1 A, VGEN = - 4.5 V, Rg = 6 Ω

f = 1.0 MHz

VDS = - 10 V, VGS = - 4.5 V, ID = - 1.5 A

2.90.651.0913302813124

20454220258

nCnsΩ

4.5

nC

VGS(th) IGSSIDSSID(on) RDS(on) gfs VSD

VDS = VGS, ID = - 250 µA VDS = 0 V, VGS = ± 12 V VDS = - 20 V, VGS = 0 V VDS = - 20 V, VGS = 0 V, TJ = 85 °C

VDS = - 5 V, VGS = - 4.5 V VGS = - 4.5 V, ID = - 1.5 A VGS = - 3.6 V, ID = - 1.4 A VGS = - 2.5 V, ID = - 0.8 A VDS = - 10 V, ID = - 1.5 A IS = - 0.8 A, VGS = 0 V

- 2

0.1200.1400.2203.4- 0.8

- 1.10.1500.1750.265

SVΩ

- 0.6

- 1.3- 1- 5

V

± 100 nA

µAA

Max.

Unit Notes:

a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.

b. Guaranteed by design, not subject to production testing.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operationof the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximumrating conditions for extended periods may affect device reliability.

TYPICAL CHARACTERISTICS 25°C, unless otherwise noted4.0VGS = 5 V thru 2.5. V 3.2ID-Drain Current (A)ID-Drain Current (A)3.24.0TC = - 55 °C25 °C125 °C2.42 V1.62.41.60.81.5V0.00.0 1 V, 0.5 V0.81.62.43.24.00.80.00.00.51.01.52.02.53.0VDS -Drain-to-Source Voltage (V)VGS - Gate-to-Source Voltage (V)Output Characteristics

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Transfer Characteristics

Document Number: 73253S10-0110-Rev. D, 18-Jan-10

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TYPICAL CHARACTERISTICS 25°C, unless otherwise noted0.40500RDS(on)-On-Resistance (Ω)0.32C - Capacitance (pF)4000.24VGS = 2.5 V300Ciss0.16VGS = 3.6 V200Coss100Crss0.08VGS = 4.5 V0.00012ID -Drain Current (A)340048121620VDS -Drain-to-Source Voltage (V)On-Resistance vs. Drain Current

5VDS = 10 VID = 1.5 A4RDS(on) -On-Resistance1.41.6VGS = 4.5 VID = 1.5 ACapacitance

VGS-Gate-to-Source Voltage (V)(Normalized)31.221.010.800.00.51.01.52.02.53.00.6-50-250255075100125150Qg -Total Gate Charge (nC)TJ -Junction Temperature (°C)Gate Charge

100.400.35RDS(on)-On-Resistance (Ω)TJ = 150 °CIS-Source Current (A)0.300.250.200.150.100.050.100.30.60.91.21.5 -Source-to-Drain Voltage (V)VSD0.000On-Resistance vs. Junction Temperature1ID = 0.8 AID = 1.5 ATJ = 25 °C12345VGS -Gate-to-Source Voltage (V) Source-Drain Diode Forward VoltageOn-Resistance vs. Gate-to-Source VoltageDocument Number: 73253

S10-0110-Rev. D, 18-Jan-10www.vishay.com

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Si1403BDLVishay SiliconixTYPICAL CHARACTERISTICS 25°C, unless otherwise noted0.50.40.3VGS(th)Variance (V)0.20.10.0-0.12-0.2-0.3- 50010-28ID = 250 µAPower (W)6104- 25025507510012515010-11Time (s)10100TJ - Temperature (°C)Threshold Voltage10Limited byRDS(on)*1ID-Drain Current (A)Single Pulse Power, Junction-to-Ambient10 µs 100 µs 1 ms10 ms0.1100 ms1 s, 100 s, DC0.01TA = 25 °CSingle Pulse0.0010.1110100 -Drain-to-Source Voltage (V)VDS* VGS> minimum VGS at which RDS(on) is specifiedSafe Operating Area

21Normalized Effective TransientThermal ImpedanceDuty Cycle = 0.50.2Notes:0.10.10.050.02Single Pulse0.0110-410-310-210-11PDMt1t21. Duty Cycle, D =t1t22. Per Unit Base = RthJA = 180 °C/W3. TJM - TA = PDMZthJA(t)4. Surface Mounted10100600Square Wave Pulse Duration (s)Normalized Thermal Transient Impedance, Junction-to-Ambientwww.vishay.com4Document Number: 73253S10-0110-Rev. D, 18-Jan-10

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TYPICAL CHARACTERISTICS 25°C, unless otherwise noted

21Normalized Effective TransientThermal ImpedanceDuty Cycle = 0.50.20.10.10.050.02SinglePulse 0.0110-410-310-210-1110Square Wave Pulse Duration (s)Normalized Thermal Transient Impedance, Junction-to-Foot

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for SiliconTechnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, andreliability data, see www.vishay.com/ppg?73253.

Document Number: 73253S10-0110-Rev. D, 18-Jan-10www.vishay.com

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Package Information

Vishay Siliconix

SCĆ70: 6ĆLEADS

MILLIMETERS654E1E123-B-ee1D-A-cA2ALA1bINCHESMin0.035–0.0310.0060.0040.0710.0710.0450.0470.004DimAA1A2bcDEE1ee1LMin0.90–0.800.150.101.801.801.151.200.10Nom–––––2.002.101.250.65BSC1.300.207_NomMax1.100.101.000.300.252.202.401.351.400.30Nom–––––0.0790.0830.0490.026BSC0.0510.0087_NomMax0.0430.0040.0390.0120.0100.0870.0940.0530.0550.012ECN: S-03946—Rev. B, 09-Jul-01DWG: 5550Document Number: 7115406-Jul-01

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AN813

Vishay Siliconix

Single-Channel LITTLE FOOTR SC-70 3-Pin and 6-Pin MOSFET

Recommended Pad Pattern and Thermal Peformance

INTRODUCTION

This technical note discusses pin-outs, package outlines, padpatterns, evaluation board layout, and thermal performancefor single-channel LITTLE FOOT power MOSFETs in theSC-70 package. These new Vishay Siliconix devices areintended for small-signal applications where a miniaturizedpackage is needed and low levels of current (around 350 mA)need to be switched, either directly or by using a level shiftconfiguration. Vishay provides these single devices with arange of on-resistance specifications and in both traditional3-pin and new 6-pin versions. The new 6-pin SC-70 packageenables improved on-resistance values and enhancedthermal performance compared to the 3-pin package.

BASIC PAD PATTERNS

See Application Note 826, Recommended Minimum PadPatterns With Outline Drawing Access for Vishay SiliconixMOSFETs, (http://www.vishay.com/doc?72286) for the basicpad layout and dimensions for the 3-pin SC-70 and the 6-pinSC-70. These pad patterns are sufficient for the low-powerapplications for which this package is intended. Increasing thepad pattern has little effect on thermal resistance for the 3-pindevice, reducing it by only 10% to 15%. But for the 6-pindevice, increasing the pad patterns yields a reduction inthermal resistance on the order of 35% when using a 1-inchsquare with full copper on both sides of the printed circuit board(PCB). The availability of four drain leads rather than thetraditional single drain lead allows a better thermal path fromthe package to the PCB and external environment.

PIN-OUT

Figure 1 shows the pin-out description and Pin 1 identificationfor the single-channel SC-70 device in both 3-pin and 6-pinconfigurations. The pin-out of the 6-pin device allows the useof four pins as drain leads, which helps to reduce on-resistanceand junction-to-ambient thermal resistance.

SOT-323SC-70 (3-LEADS)

Top ViewG

13D1EVALUATION BOARDS FOR THE SINGLESC70-3 AND SC70-6

Figure 2 shows the 3-pin and 6-pin SC-70 evaluation boards(EVB). Both measure 0.6 inches by 0.5 inches. Their copperpad traces are the same as described in the previous section,Basic Pad Patterns. Both boards allow interrogation from theouter pins to 6-pin DIP connections, permitting test sockets tobe used in evaluation testing.

The thermal performance of the single SC-70 has beenmeasured on the EVB for both the 3-pin and 6-pin devices, theresults shown in Figures 3 and 4. The minimum recommendedfootprint on the evaluation board was compared with theindustry standard of 1-inch square FR4 PCB with copper onboth sides of the board.

SOT-363SC-70 (6-LEADS)

Top View65DD2S2G34FIGURE 1.

For package dimensions see outline drawings:

SC-70 (3-Leads) (http://www.vishay.com/doc?71153)SC-70 (6-Leads) (http://www.vishay.com/doc?71154)

Front of Board SC70-3

Back of Board, SC70-3 and SC70-6

Front of Board SC70-6

ChipFETr

ChipFETr

vishay.com

FIGURE 2.

Document Number: 7123612-Dec-03

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THERMAL PERFORMANCE

Junction-to-Foot Thermal Resistance(the Package Performance)

Thermal performance for the 3-pin SC-70 measured asjunction-to-foot thermal resistance is 285_C/W typical,340_C/W maximum. Junction-to-foot thermal resistance forthe 6-pin SC70-6 is 105_C/W typical, 130_C/W maximum —a nearly two-thirds reduction compared with the 3-pin device.The “foot” is the drain lead of the device as it connects with thebody. This improved performance is obtained by the increasein drain leads from one to four on the 6-pin SC-70. Note thatthese numbers are somewhat higher than other LITTLE FOOTdevices due to the limited thermal performance of the Alloy 42lead-frame compared with a standard copper lead-frame.

SC-70 (6-PIN)Room Ambient 25 _CPD+TJ(max)*TARqJAElevated Ambient 60 _CPD+TJ(max)*TARqJAo*25oCPD+150Co180CńWo*60oCPD+150Co180CńWPD+694mWPD+500mWNOTE: Although they are intended for low-power applications,devices in the 6-pin SC-70 will handle power dissipation inexcess of 0.5 W.Testing

To aid comparison further, Figures 3 and 4 illustratesingle-channel SC-70 thermal performance on two differentboard sizes and two different pad patterns. The results displaythe thermal performance out to steady state and produce agraphic account of the thermal performance variation betweenthe two packages. The measured steady state values of RθJAfor the single 3-pin and 6-pin SC-70 are as follows:

Junction-to-Ambient Thermal Resistance(dependent on PCB size)

The typical RθJAfor the single 3-pin SC-70 is 360_C/W steadystate, compared with 180_C/W for the 6-pin SC-70. Maximumratings are 430_C/W for the 3-pin device versus 220_C/W forthe 6-pin device. All figures are based on the 1-inch squareFR4 test board.The following table shows how the thermalresistance impacts power dissipation for the two differentpin-outs at two different ambient temperatures.

LITTLE FOOT SC-70

3-Pin

6-Pin

329.7_C/W211.8_C/W

1) Minimum recommended pad pattern(see Figure 4) on the EVB.

410.31_C/W360_C/W

SC-70 (3-PIN)Room Ambient 25 _CPD+TJ(max)*TARqJAElevated Ambient 60 _CPD+TJ(max)*TARqJA2) Industry standard 1” square PCB withmaximum copper both sides.

o*25oCPD+150Co360CńWo*60oCPD+150Co360CńWPD+347mWPD+250mWThe results show that designers can reduce thermalresistance RθJA on the order of 20% simply by using the 6-pindevice rather than the 3-pin device. In this example, a 80_C/Wreduction was achieved without an increase in board area. Ifincreasing board size is an option, a further 118_C/W reductioncould be obtained by utilizing a 1-inch square PCB area.

400400

320

Thermal Resistance (C/W)3-pin240

6-pin160

Thermal Resistance (C/W)320

3-pin240

6-pin160

80

0.5 in x 0.6 in EVB010-5

10-4

10-3

10-2

10-1

1

10

100

1000

Time (Secs)

80

1” Square FR4 PCB0

10-510-4

10-3

10-2

10-1

1

10

100

1000

Time (Secs)

FIGURE 3.Comparison of SC70-3 and SC70-6 on EVBFIGURE 4.

Comparison of SC70-3 and SC70-6 on 1” Square FR4 PCB

Document Number: 71236

12-Dec-03

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Application Note 826

Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead

0.067(1.702)(2.438)0.016(0.406)0.026(0.648)0.010(0.241)Recommended Minimum PadsDimensions in Inches/(mm)Return to IndexReturn to IndexAPPLICATION NOTE(1.143)0.0960.045(0.648)0.026

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Document Number: 72602

Revision: 21-Jan-08

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Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustainingapplications or for any other application in which the failure of the Vishay product could result in personal injury or death.Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agreeto fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses anddamages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishayor its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel toobtain written terms and conditions regarding products designed for such applications.

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Material Category Policy

Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill thedefinitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Councilof June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment(EEE) - recast, unless otherwise specified as non-compliant.

Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm thatall the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.

Revision: 12-Mar-12

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SI1403BDL-T1-E3