Recent progress in diamond-based MOSFETs

Invited Review

Recent progress in diamond-based MOSFETs

Xiao-lu Yuan1,2), Yu-ting Zheng1), Xiao-hua Zhu1), Jin-long Liu1), Jiang-wei Liu3), Cheng-ming Li1), Peng Jin2,4), and Zhan-guo Wang2,4)

1) Institute for Advanced Materials and Technology, University of Science and Technology Beijing, Beijing 100083, China

2) Key Laboratory of Semiconductor Materials Science and Beijing Key Laboratory of Low-dimensional Semiconductor Materials and Devices, Institute of Semiconduc-tors, Chinese Academy of Sciences, Beijing 100083, China

3) Research Center for Functional Materials, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044, Japan 4) Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China (Received: 13 January 2019; revised: 22 March 2019; accepted: 12 May 2019)

Abstract: Recent developments in the use of diamond materials as metal-oxide-semiconductor field-effect transistors (MOSFETs) are in-troduced in this article, including an analysis of the advantages of the device owing to the unique physical properties of diamond materials, such as their high-temperature and negative electron affinity characteristics. Recent research progress by domestic and international research groups on performance improvement of hydrogen-terminated and oxygen-terminated diamond-based MOSFETs is also summarized. Cur-rently, preparation of large-scale diamond epitaxial layers is still relatively difficult, and improvements and innovations in the device struc-ture are still ongoing. However, the key to improving the performance of diamond-based MOSFET devices lies in improving the mobility of channel carriers. This mainly includes improvements in doping technologies and reductions in interface state density or carrier traps. These will be vital research goals for the future of diamond-based MOSFETs. Keywords: diamond; MOSFETs; semiconductor; carrier mobility; doping

1. Introduction

With the development of commercial integrated circuit manufacturing using a 22 nm process, conventional sili-con-based metal-oxide-semiconductor field-effect transistors (MOSFETs) cannot meet the requirements of high-frequency and high-power applications due to their short channel ef-fects. In recent years, research on diamond-based MOSFETs has been widely conducted. Diamond, which has exception-al intrinsic physical properties such as an ultrawide band gap energy (5.5 eV), ultrahigh thermal conductivity (22 W/(cm·K)), high carrier mobilities (4500 and 3800 cm2/(V·s) for electrons and holes, respectively), and a high breakdown electric field (10 MV/cm) [1–3], could provide a solution for the production of next-generation high-power, high-temperature, and high-frequency electronic devices [4–5]. However, the implementation of diamond-based electronic devices, from material preparation to device application, still has many challenges, such as the growth of high-quality diamond epi-

taxial materials, the preparation of large-scale diamond wa-fers, and improvements in doping technologies of diamond. The high cost of manufacturing diamond materials is a ma-jor factor hindering the development of diamond electronic devices. Numerous efforts have been made to improve the electrical performance of MOSFETs based on an undoped diamond epitaxial layer. Studies on p-type doping of di-amonds also have made great progress. However, studies on n-type doping of diamonds are relatively rare. This is be-cause incomplete ionization of the phosphorus ion dopants at room temperature results in high-resistance n-type di-amond materials, which hinders the development of both junction field-effect transistor and complementary met-al-oxide-semiconductor devices.

To promote the development of diamond-based electron-ic devices and accelerate research into diamond-based MOSFETs, the advantages of diamond semiconductor ma-terials in power devices are explained in terms of three of their basic physical properties. Results of research into di-

Corresponding authors: Cheng-ming Li E-mail: chengmli@mater.ustb.edu.cn; Peng Jin E-mail: pengjin@semi.ac.cn © University of Science and Technology Beijing and Springer-Verlag GmbH Germany, part of Springer Nature 2019

1196 amond-based MOSFETs over the past three years are intro-duced, including two types of terminated diamond-based MOSFETs: H-terminated and O-terminated. Key points of the device process are described. We also briefly present several challenges for diamond-based MOSFETs regarding not only size, crystal quality, and doping, but also the inter-facial contact between the diamond and metal oxide or met-al. Finally, some anticipated future research objectives of diamond-based MOSFETs are summarized.

2. Physical properties and advantages

2.1. High-temperature characteristics

Silicon-based power devices generally work in a strong ionization region at room temperature, and fail to work over a certain temperature, while diamond appears to have inter-esting properties at high temperatures and can compete with other high-temperature materials (SiC, etc.). Fig. 1 shows the normalized specific resistance of silicon, silicon carbide, and diamond with respect to temperature; the specific resis-tance of p-type diamond decreases sharply with increasing temperature, indicating that the larger the band gap, the higher the temperature corresponding to the intrinsic excitation, and the higher the limiting operating temperature of the device. The minimum on-state specific resistance of field effect de-vices at different temperatures is related to the carrier density and carrier mobility of the material following Eq. (1):

R3001.5m

EEon,min(T)Ron,min(300)T

expD,AkTD,A0.0259 (1) where Ron,min is the minimum on-state specific resistance; T is the absolute temperature, K; k is the Boltzmann constant; ED,A is the ionization energy of the donor D or acceptor A; and m is a parameter reflecting the change in carrier mobility over time. Generally, boron-doped diamond (0.37 eV) has not been completely ionized at room temperature. This results in the high sheet resistance of diamond semiconductors, which is not favorable for improving MOSFET performance. As the temperature rises within a certain range, more boron ions are activated, producing more thermal carrier holes, causing the resistivity of the device to decrease, which, among all sem-iconductors, is unique to diamond materials. In contrast to

boron-doped p-type diamond field effect transistors (FETs),

where the acceptor level can be as deep as 0.37 eV, indicat-ing strong temperature dependence, p-channel FETs, based

on two-dimensional hole gas of the C‒H diamond surface with a passivation layer, are temperature-independent [6]. This is very beneficial to the stable operation of H-terminated diamond-based MOSFETs at high tempera-

Int. J. Miner. Metall. Mater., Vol. 26, No. 10, Oct. 2019

tures (up to 400°C or higher). Therefore, the high tempera-ture characteristics of diamond are highly worthy of further investigation.

Fig. 1. Normalized specific resistance of silicon, silicon car-bide, and diamond with temperature.

2.2. Deep depletion characteristics

Under different electric fields, the devices will form dif-ferent working regions, including an accumulation region, a depletion region, a linear region, and a saturation region. There is a deep depletion state between the depletion region and the linear region. The deep depletion state [7] is a non-equilibrium state, which means that, when a pulse voltage is applied, since the rate of generation of the minority carriers in the space charge layer cannot keep up with the voltage change, an inversion layer is established too slowly. The depletion layer continuously extends to the depth of the semiconductor to generate a large amount of negative

charge acceptors (for p-type semiconductors) to reach an electrically neutral equilibrium, as shown in Fig. 2 [8].

Fig. 2. Electric field profile for the metal-oxide-semiconductor (MOS) structure under deep depletion state (EOX―the electric

field in the oxide; E1―the electric field in the semiconductor;

tOX―the thickness of oxide; WD,MOS―the depletion layer width for MOS). Reprinted by permission from Springer Nature: Power MOSFETs, In: Fundamentals of Power Semiconductor Devices, B.J. Baliga, Copyright 2008.

X.L. Yuan et al., Recent progress in diamond-based MOSFETs In the depletion region, the surface depletion layer width Wd increases as the applied gate voltage VG increases. Once a strong inversion occurs, the surface depletion layer width reaches a maximum value of Wdm, which no longer changes with changes in applied voltage. At a certain temperature, for different substrate materials with the same doping con-centration, the larger the band gap Eg, the smaller the intrin-sic carrier concentration ni, and the larger the maximum width Wdm of the depletion layer. That is, at the same gate voltage, a material with a large band gap does not reach the inversion state as easily, and it is necessary to apply a higher voltage to generate the inversion layer. The relevant formu-las are as follows:

Wd=21/2s0sqNA (2)



where Ψs is the surface potential, εs is the relative dielectric constant of the semiconductor material, ε0 is the vacuum di-electric constant, q is the electron charge, and NA is the sub-strate doping concentration.

1/2

W40k0TlnqNNA

dm=s2A

n (3)

iwhere T is the absolute temperature, K; ni is the intrinsic carrier concentration; and k0 is the Boltzmann constant. n22πk0T3/2m*pm*3/4niEg3exph

2k0T (4) where h is Planck’s constant, mp is the effective mass of the

hole, mn is the effective mass of the electron, and Eg is the band gap.

Overall, for diamond, the band gap Eg is 5.5 eV, which makes diamond a wide-band-gap semiconductor material. In diamond-based MOSFET devices, a high-bias voltage is needed to obtain the inversion layer. In other words, di-amond-based MOSFETs are more prone to generation of a deep depletion state. For device performance metrics, their threshold voltage will be higher than that of silicon devices. 2.3. Negative electron affinity (NEA) characteristics

Electron affinity refers to the energy value of the conduc-tion band minimum of a material and the vacuum level. For hydrogen-terminated diamond, this value is negative; i.e., an electron at the conduction band minimum (CBM) is free to leave the surface without restriction. As early as 1998, Cui et al. [9] discovered the NEA of hydrogen-terminated di-amond surfaces. The formation of C–H dipoles is consi-dered to be the origin of the NEA in hydrogen-terminated diamond. In the case of oxidized diamond, these dipoles are

1197

reversed, giving rise to a positive electron affinity. The unique NEA surface has a considerable potential for the ac-cumulation of holes (1013 cm–2) [10–13]. By utilizing the hole accumulation layer, because of the NEA on H-terminated diamond and the surface adsorption acceptors [14], p-channel undoped diamond-based MOSFETs, different from tradi-tional boron-doped silicon-based MOSFETs, can be formed. The performance of this device will exceed those of other wide-band-gap materials, such as SiC or GaN [15–17]. Ad-ditionally, the diamond surface becomes conductive, which is a unique behavior among semiconducting materials, due to the NEA of hydrogen terminated diamond, as shown in Fig. 3 [18]. Diamond is expected to be one of the most

promising materials for cold cathode emitters, which are

expected to generate high electron emissivities. Fig. 3. Schematic images of the near-surface band diagram

(CBM―the conduction band minimum; VBM―the valence

band maximum; VL―the vacuum level; χ―the electron affin-ity). Reprinted from D. Takeuchi, H. Kato, G.S. Ri, T. Yamada, P.R. Vinod, D. Hwang, C.E. Nebel, H. Okushi, and S. Yamasaki, Applied Physics Letters, 86, 152103 (2005), with the permission of AIP Publishing.

3. Recent progress in diamond-based MOSFETs

In 1991, Gildenblat et al. [19] pioneered the preparation of metal-oxide-semiconductor FETs based on boron-doped epitaxial diamond, with SiO2 as the gate oxide layer, which could work normally at 300°C. A few years later, Aoki and Kawarada [20] developed a hydrogen-terminated MOSFET from single crystal diamond. The first inversion diamond MOSFET was reported using boron-doped O-terminated (100) diamond [21]. The surface behavior of diamond is very sensitive to the termination state, and the surface state depends directly on the experimental treatment conditions of the diamond surface. Currently, there are two kinds of ter-minals for diamond surfaces that have undergone a great deal of research for use in diamond-based MOSFETs. Among these studies, the research on undoped hydro-gen-terminated diamond-based MOSFETs has received the most attention and developed the fastest.

1198 Int. J. Miner. Metall. Mater., Vol. 26, No. 10, Oct. 2019

3.1. H-terminated diamond-based MOSFETs

Hydrogen-terminated diamond refers to a type of di-amond material with C‒H bonds or C‒N bonds on the sur-face of the diamond, which accumulates holes near the sur-face and becomes conductive. Compared to C‒H bonds [22], the formation of surface C‒N bonds leads to a greater ac-cumulation of holes [23], thus increasing the carrier concen-tration. Currently, a hole concentration of up to 1014 cm–3 has been induced by NO2. The adsorbed species that induce an increase in the hole concentration on the surface of the H-terminated diamond are air, NO2, V2O5 [10], Al2O3, MoO3, AlN, fullerenes and their fluorides, etc. Studies have shown that the change in the hole concentration on hydro-gen-terminated surfaces is caused by NO2, O3, SO2, and NO in the adsorbed air, while H2O, CO2, and N2O have little ef-fect on the generation of hole carriers [11]. Although the hole concentration generated in NO2-adsorbed hydro-gen-terminated diamond-based MOSFETs is unstable at high temperatures, the deposition of a thin layer of Al2O3 [12] by atomic layer deposition (ALD) as a p-channel passiva-tion layer can effectively solve the stability problem of the device. For example, an Al2O3/NO2/H-diamond FET is sta-ble at 400°C with a current density of 1.35 A/mm [11].

Numerous diamond gate oxides have been studied in re-

cent years, including HfO2 [14], LaAlO3 [24], Ta2O5 [25], ZrO2 [26], and Y2O3 [27], all with high dielectric constants for the gate oxide of hydrogen-terminated diamond-based MOSFETs. There are two reasons for choosing a high-k material for the gate oxide: one is to obtain a larger drain current density at a lower voltage bias, and the other is to increase the insulation of the gate and reduce leakage cur-rent. From the perspective of reducing leakage current, de-positing a bilayer or multilayer oxide onto the surface of hy-drogen-terminated diamond is more conducive to reducing leakage current compared to depositing a single oxide layer. Liu et al. [28] developed high-k TiO2/Al2O3 insulator struc-tures on H-diamond, which showed a low leakage current in MOS capacitors, mainly ascribed to the high offset of the va-lence band. Bilayer oxide insulators such as ZrO2/Al2O3 [29], LaAlO3/Al2O3 [24], HfO2/Al2O3 [30], TiO2/Al2O3 [28], and AlN/Al2O3 [31] have been deposited onto hydrogen-terminated diamond to improve the capability of the gate-controlling channel current and obtain normally-off H-terminated di-amond-based MOSFETs [32]. In addition, having no inter-space (see Fig. 4) between the source/drain and gate is beneficial for reducing on-resistance and obtaining a higher drain current density (224.1 mA/mm) [26], although switching ratio decreases and leakage current increases [28].

Fig. 4. Schematic cross-sectional structures of SD-ZrO2/ALD-Al2O3/H-diamond MISFETs: (a) without and (b) with IS/D-CH (IS/D-CH : the source/drain-channel interspaces). Reprinted from Springer Nature: Scientific Reports, Low on-resistance diamond field effect transistor with high-k ZrO2 as dielectric, J. Liu, M. Liao, M. Imura, A. Tanaka, H. Iwai, and Y. Koide, Copyright 2014.

Kawarada et al. [15–17] have focused on improving the breakdown voltage of hydrogen-terminated diamond-based MOSFETs in recent years. By implementing a C‒H bonded channel with a wide gate-drain length of up to 20 μm on black polycrystalline diamond [15], a breakdown voltage of 1.8 kV was achieved as well as a current density of 1.1 mA/mm. The experiment showed that an increase in the distance between the gate and drain is beneficial for im-proving breakdown voltage, which was also shown in another report [16]. Although the effects of grain boundaries and cracks in polycrystalline diamond on the breakdown voltage of the device is unclear, the electrical properties ob-tained have been comparable to the electrical properties of current single-crystal boron-doped O-terminated diamond.

As shown in Fig. 5 [17], fabricated hydrogen-terminated

(C‒H) diamond-based MOSFETs, using a partially oxidized (partial C‒O) channel, showed a high breakdown voltage

Fig. 5. Schematic diagram of the C‒H diamond MOSFET with partial C‒O channel. Copyright 2017 IEEE. Reprinted, with permission, from IEEE Electron Device Letters, Vol. 38, No. 38, Mar 2017.

X.L. Yuan et al., Recent progress in diamond-based MOSFETs 1199

of >2 kV (the highest absolute value reported for a diamond FET) at room temperature. However, the current density (18.2 mA/mm) was still much lower than that of conven-tional hydrogen-terminated diamond-based MOSFETs

Breakdown vol-tage / kV

1.8

(more than 100 mA/mm [33‒34]), and needs further im-provement. Table 1 summarizes the breakdown voltages of hydrogen-terminated diamond-based MOSFETs reported by their group.

Table 1. Breakdown voltage of hydrogen-terminal diamond MOSFET Breakdown electric field / (MVcm‒1)

1.1

Drain current density /

(mAmm‒1)

1.1

Device structure

1.7 0.8‒1.0 120 Al2O3/H-terminated diamond [16]

Black polycrystalline diamond [15]

2.0 0.8

18.2 C‒H diamond MOSFET with partial C‒O channel [17]

Liao et al. [35] discussed the frequency dispersion of ca-pacitance-voltage characteristics based on impedance analy-sis of Al2O3/H-terminated diamond MOS structures. The

results showed that the phenomenon may be related to the high series resistance of the MOS structure. The gate oxide capacitance value obtained by correcting the current‒voltage (C‒V) measurement of the series resistance was consistent with the measured impedance spectrum value.

Wong et al. [36] simulated an H-terminated diamond MOSFET with a 1.3 A/mm drain current density using TCAD software in combination with parameters from the relevant literature, and deduced that a reduction of the low field mobility in an actual device is the main cause of cur-rent degradation. Moreover, with the calibrated parameters, a highly-scaled MOSFET was simulated, and it was pre-dicted that if the gate length can be scaled down to ~0.1 μm, the cut-off frequency fT would be >100 GHz. Recently, Wong et al. [37] proposed a new model, assuming an inho-mogeneous band gap in the interfacial layer, to explain the abnormal behavior of H-terminated diamond-based MOS-FETs, such as double pumps in transconductance measure-ment experiments. The simulated and experimental perfor-mance of nonepitaxial H-terminated diamond-based MOS-FETs has also been investigated by Fu et al. [38‒39], whose results have good consistency. A more accurate physical model should be proposed for further research on diamond devices. For radio frequency (RF) characteristics, the NTT Cor-poration [40] achieved an output power density of 2.1 W/mm at 1 GHz, the highest reported such value in an H-terminated polycrystalline diamond MOSFET with a gate length of 100 nm. Maximum cut-off frequency fT and the maximum frequency of oscillation fmax were 45 GHz and 120 GHz, respectively, which were much higher than the highest values reported for single-crystal diamond FETs. However, Russell et al. [33] achieved the highest fT of 53 GHz (greater than 45 GHz) by the reduction of gate length (50 nm) onto single-crystal diamond FETs, despite im-provements in the frequency performance of diamond RF

FETs brought about by short-channel effects that decreased

the direct-current (DC) characteristics. Wang et al. [41] from Hebei Institute of Semiconductors, China compared the DC characteristics and RF small-signal characteristics of hy-drogen-terminated diamond FETs prepared on single crystal substrates with those prepared on polycrystalline substrates. It was found that hydrogen-terminated diamond-based MOSFETs on polycrystalline substrates had the better DC and small-signal characteristics, while single-crystal di-amond-based MOSFETs had the higher breakdown voltage and output power density. These results indicate that di-amond devices are expected to provide the best RF power performance among all semiconductors, such as SiC and GaN. However, excellent RF performance needs higher material quality, and there is still a long way to go for both single crystal and polycrystalline diamond-based devices. 3.2. O-terminated diamond-based MOSFETs

Oxygen-terminated diamond refers to a type of diamond material with a C‒O or C‒OH bond on the surface of the diamond material. Usually, oxygen-terminated diamonds need to be combined with doping technology for device ap-plication. In 2018, Pham et al. [42] reported a comprehen-sive electrical analysis of metal/Al2O3/O-terminated di-amond capacitance. A deep depletion MOSFET was pre-pared by depositing Al2O3 onto p-type boron-doped (100) oxygen-terminated diamond at 380°C with ALD, for which the hole mobility was (1000 ± 200) cm2/(V·s), the highest value currently reported, and the breakdown voltage was 200 V [43]. The on-state current was 1.9 μA/mm, which was much smaller than the current density of hydro-gen-terminated diamond-based MOSFETs. The strong Fer-mi level pinning was demonstrated to be induced by the combined effects of leakage current through the oxide and the presence of diamond/oxide interface states whose inter-facial state densities were calculated to be on the order of 1012 eV–1cm–2. They proposed a deep depletion concept for diamond-based MOSFETs, with Al2O3 deposited by ALD at

1200 Int. J. Miner. Metall. Mater., Vol. 26, No. 10, Oct. 2019

380°C [44]. In the deep depletion region, the wide-band-gap of diamond causes there to be an infinitely long time period of generation of minority carriers if no source of minority carriers is provided for the inversion layer.

The conductive channel of conventional MOSFETs is the inversion layer. However, due to the wide-band-gap of di-amond and its high electrical resistance, an inversion layer in diamond-based MOSFETs is difficult to achieve.

In 2015, Kovi et al [21] first observed inversion behavior in MOS structures based on boron-doped diamond, with a doping concentration of 4.1 × 1019 cm–3. However, heavy dop-ing resulted in large leakage currents, resulting in poor electrical properties and the inability to compete with H-terminated di-amond-based MOSFETs. Subsequently, Matsumoto et al. [45] fabricated p-channel and planar-type MOSFETs with a phosphorus-doped n-type body on a diamond (111) substrate by selectively growing a p-type layer using microwave plas-ma chemical vapor deposition. Later, in 2018 they directly observed the inversion capacitance in p-type diamond MOS capacitors, as shown in Table 2 [46]. Achieving an inversion layer in oxygen-terminated diamond is essential for the even-tual application of diamond-based MOSFETs. However, nu-merous problems still need to be solved, such as extremely low drain current density and poor cycling of the device. Analysis of the band structure is an important means to study the mechanism of carrier transport. By analyzing the valence band offset between the gate oxide and the diamond material, the electrical properties of the device can be ex-plained from a microscopic, physical perspective. Maréchal et al. [47] developed a kind of MOS structure using an ALD of 250°C Al2O3 onto oxygen-terminated boron-doped (001) diamond. They also established an interfacial energy band diagram for the Al2O3/O-terminated diamond configuration by performing X-ray photoelectron spectroscopy (XPS) measurements. The band diagram alignment was concluded to be of type I with a valence band offset Ev of (1.34 ± 0.20) eV and conduction band offset Ec of (0.56 ± 0.20) eV, con-sidering an Al2O3 energy band gap of 7.4 eV. The valence band offset Ev of Al2O3/H-terminated diamond is (2.90 ± 0.20) eV [48], and the band diagram alignment is type II, as shown in Fig. 6. Thus, the Al2O3/O-terminated diamond MOS could be suitable as a gate for the next-generation in-version MOSFET. This difference may be related to the terminal state of the diamond surface.

Table 2. Implementation of the inversion layer

Year 2015 2016 2018

Research group Isberg [21] Matsumoto [45] Matsumoto [46]

Drift layer p-type (100) diamond n-type (111) diamond p-type (111) diamond

Key technology

Heavily boron doped

Selective growth p-type layer with CVD Selective growth n-type layer with CVD

Note: CVDchemical vapor deposition.

Fig. 6. Band diagram alignments of (a) Al2O3/H-diamond (Egox―the bandgap energy of oxide; Egsc―the bandgap energy of semi-conductor; ECL―the core level energy) and (b) Al2O3/O-diamond (Eg―the bandgap energy). Reprinted from A. Maréchal, M. Aou-kar, C. Vallée, C. Rivière, D. Eon, J. Pernot, and E. Gheeraert, Applied Physics Letters, 107, 141601 (2015) for (a) and J.W. Liu, M.Y. Liao, M. Imura, and Y. Koide, Applied Physics Letters, 101, 252108 (2012) for (b), with the permission of AIP Publishing.

3.3. Post-thermal treatment

Annealing plays an important role in the entire device preparation process and determines the electrical perfor-mance of the entire MOSFET. In some cases, proper an-nealing temperature, atmosphere, and time can greatly im-

prove the overall performance of the device, such as simul-taneously increasing current density and decreasing leakage current. For example, using 40 nm thick Al2O3 deposited by ALD at 380°C and then annealing at 500°C under vacuum, a high-quality Al2O3 and Al2O3/diamond interface was ac-

X.L. Yuan et al., Recent progress in diamond-based MOSFETs 1201

quired [49], which had monocrystalline character in the Al2O3 layer, as revealed by transmission electron microscope. The density of the interfacial states was <1012 eV–1cm–2. SD-LaAlO3/ALD-Al2O3/H-terminated diamond-based MOS-FETs [32] were changed from a normally-on to normally-off operation after annealing at 180°C, and the threshold vol-tage changed from (0.8 ± 0.1) V to (–0.5 ± 0.1) V. The me-chanism behind the switch of the normally on/off characte-ristics induced by annealing may indicate that the annealing process caused the loss of adsorbed acceptors on the surface of the hydrogen-terminated diamond. Another reason may be that the annealing treatment caused the positive charge to be compensated by the oxide layer, resulting in a sharp de-crease in the hole concentration. On the other hand, the an-nealing process is often employed in tandem with other processes in device fabrication, and most of the process pa-rameters are based on large amounts of experience.

4. Current challenges

4.1. Size, crystal quality and doping

Based on the structure of the device, there are two basic types of diamond-based MOSFETs: vertical and planar. For vertical MOSFETs, it is necessary to achieve high-speed growth of diamond wafers. For planar MOSFETs, high-quality (such as a fairly low roughness) and large-size diamond films are needed. However, high-speed and large-scale pro-duction of bulk crystals remains challenging [50]. According

to current diamond growth technology, the growth rate is inversely proportional to the crystal quality (mainly refer-ring to roughness). The faster the growth rate, the worse the crystal quality. Furthermore, it is extremely difficult to achieve large-scale and high-quality single crystalline di-amond wafers (>2 inches), whether homoepitaxial or hete-roepitaxial. The interface of the mosaic method has still not been optimized, and the dislocation density of the heteroe-pitaxial method is too high. Numerous efforts have been made to fabricate large-scale diamonds [51‒52].

Controlling the number of defects in the crystal is also critical, especially for electronic applications. Generally speaking, various defects form during crystal growth and are inevitable, regardless of whether these defects are macros-copic or microscopic, such as point defects (impurities or vacancies), line defects (dislocations), and planar defects (stacking faults). These defects will reduce device perfor-mance to a greater or lesser degree. For example, a high dislocation density will reduce the breakdown voltage of the device and increase leakage current. However, some defects are introduced due to poor preparation methods and should be avoided as much as possible. Diamonds grown using he-teroepitaxial chemical vapor deposition tend to have higher dislocation densities than homoepitaxially-grown diamonds, as shown in Fig. 7 [53]. Therefore, in the process of prepar-ing diamonds, a suitable deposition method should be se-lected to obtain high-quality electronic-grade epitaxial ma-terial.

Fig. 7. Dislocation density of different single-diamond crystals. Reprinted from Boyer S. Koizumi, H. Umezawa, J. Pernot, and M. Suzuki, Key technologies for device fabrications and materials characterizations, In: Mariko Suzuki, Julien Pernot, and Satoshi Koizumi, Power Electronics Device Applications of Diamond Semiconductors, 219-294, Copyright 2018, with permission from Elsevier.

Insulating diamond acquires its conductivity by means of doping technology, representing a new generation of semi-conductor materials. Boron ion doping converts diamonds to p-type conductivity, while phosphorus ion doping results in

diamonds with n-type conductivity. Whether it is n-type doping or p-type doping, diamond doping technology cur-rently faces two major problems: one is low doping effi-ciency (B: 10%; P: 3%‒4% with CVD [53]), the other is

1202 Int. J. Miner. Metall. Mater., Vol. 26, No. 10, Oct. 2019

the high activation energy for impurities (B: 0.37 eV; P: 0.57 eV []). Even if the B incorporation efficiency with CVD was maintained close to 100% [55], the growth rate would be limited to 0.1‒1 μm/h, which is disadvantageous for vertically-structured devices. On the other hand, epitaxi-al diamond films grown with phosphorus doping on the (100) facet of diamond were very highly resistive, resulting in a frequency dispersion in the C‒V curves of the MOS-FETs because of the high series resistance, although a higher dopant level could decrease resistivity [56]. This is the most important problem in the n-type doping of diamond for use in practical electronics applications. In short, the doping technology for diamonds needs to be further improved, es-pecially for the n-type diamond. 4.2. Diamond/oxide interface

produces a Fermi level pinning effect and reduces gate con-trol capability. Additionally, the interface state density is al-so affected by different crystal orientations, terminal groups, and heat treatments. At present, the interface state density of most diamond-based MOSFETs reported in the literature is on the order of 1012 cm–2, which is larger than that of sili-con-based MOSFETs (typically on the order of 1010 cm–2). Therefore, regardless of the method used, a reduction in the density of interface states is one of the key steps to improving the performance of diamond-based MOSFETs. As mentioned previously, it is more difficult to obtain an inversion layer in diamond-based MOSFETs than in silicon-based devices. This may be due to the high interface state density causing oxide breakdown to occur prior to achieving an inversion layer. 4.3. Ohmic contact

Another crucial problem that hinders the application of diamond-based MOSFETs is the oxide and diamond inter-face quality. The deposition of the gate oxide is generally carried out by ALD. Compared with other methods, such as magnetron sputtering and thermal evaporation, the thickness of the gate oxide can be precisely obtained, which is benefi-cial for controlling the threshold voltage of the device. However, various imperfections, such as a rough diamond surface and high interfacial charge trap densities, can result in charge carrier scattering and trapping at the interface, af-fecting the performance of the MOSFETs. Thus far, large-area (mm2), low-roughness (Ra < 1 nm), and epitaxial single-crystal diamond surfaces have been difficult to obtain through current polishing and etching techniques [57]. The mobility of the charge carriers under the gate is still drasti-cally reduced by roughness scattering, especially for long-channel MOSFETs. The high interface state density

There are two forms of contact between metal and semi-conductor: rectifying contact (ohmic contact) and nonrecti-fying contact (Schottky contact). It is very important to con-trol the Schottky barrier height and width to obtain ideal Schottky contact or low-resistive ohmic contact in FETs. Under ideal conditions, the Schottky barrier height can be precisely controlled by choosing a proper metal work func-tion. However, a high interface state density causes a Fermi level pinning effect at the semiconductor/metal interface, preventing control of the Schottky barrier height with dif-ferent metal work functions. For p-type diamond devices, a high degree of impurity doping is widely used to obtain low resistive ohmic contacts. However, for n-type diamond oh-mic contacts, obtaining a low resistivity remains a major challenge due to the lack of advanced doping technologies. Moreover, the different terminal groups of the diamond sur-face can influence the formation of ohmic contacts. Fig. 8 [58]

Fig. 8. Band diagrams for the Pd/H-diamond and Pd/O-diamond junctions (BH—the barrier height; ∆Ediamond—the energy sepa-ration between the VBM and the core level C 1s of diamond; EF—the fermi level; EC 1s—the binding energy of C 1s of di-amond; Pd 3d5/2—the binding energy of Pd 3d5/2). Reprinted from Applied Surface Science, 370, F.N. Li, J.W. Liu, J.W. Zhang, X.L. Wang, W. Wang, Z.C. Liu, and H.X. Wang, Measurement of barrier height of Pd on diamond (100) surface by X-ray photoelectron spectroscopy, 496-500, Copyright 2016, with permission from Elsevier.

X.L. Yuan et al., Recent progress in diamond-based MOSFETs

shows that it is more difficult to form an interface between a metal and O-terminated diamond compared to H-terminated diamond. Li et al. [59] fabricated Schottky junctions from Au, Pd, and Cu on O-terminated diamond and investigated the barrier heights of O-terminated diamond by XPS. The results indicated that the barrier height of the metals on O-terminated diam ond were approximately 1.70 eV, and the barrier heights were almost independent of the metal work function since the Fermi level at these interfaces was com-pletely pinned in each case. The barrier height of Pd/H-terminated diamond [58] was determined to be ‒0.27 eV, which is more beneficial for the formation of ohmic contact.

5. Conclusions

Among the wide-band-gap semiconductors, diamond is widely accepted as the best material for producing high-voltage, high-power, high-temperature, and high-frequency devices [60]. To fabricate such high performance devices, it is necessary to obtain electronic-grade, high-quality, low-defect, and high-conductivity wafers. Additionally, in terms of device processing, a number of specific device structures based on H-terminated or O-terminated diamond-based MOSFETs have been studied and should continue to be optimized. The main challenges for MOS technology are improving the channel carrier mobility, reducing the interface state density, and developing effective doping techniques to obtain higher carrier concentrations at lower doping levels, which may bring about the best values for current density and break-down voltage. Therefore, one of the key points for future studies should be the influence of various scattering me-chanisms on the surface or in the bulk on the carrier mobili-ty of diamond. In addition, the high-temperature properties of diamond are very attractive and promising for the devel-opment of high-power high-temperature MOSFETs.

To date, the preparation of large-scale epitaxial diamond materials is still a key focus of research. The key to improv-ing the performance of diamond-based MOSFETs is the preparation of diamond epitaxial materials. High-quality flawless epitaxial diamond materials can greatly improve the channel mobility of carriers, reducing the density of in-terface states and the trapped carrier density. The reduction of the interface state density can be achieved by adjusting the device preparation process and avoiding, as much as possible, the degradation of interfacial quality caused by the preparation process. The ohmic contact is relatively easy to obtain through finding the appropriate process parameters; additionally, the physical mechanisms associated with di-

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amond-based electronic devices should be given more atten-tion beyond improvements in device structures and processes.

Acknowledgements

This project was financially supported by the National Key Research and Development Program of China (No. 2018YFB0406501), the Beijing Municipal Science and Technology Commission (No. Z181100004418009), and the National Natural Science Foundation of China (No. 51702313).

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